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# 8 Snapshots

Every VICE emulator has a built-in snapshot feature, that saves the complete emulator state into one file for later use. You can therefore save the emulator state - including the state of the game you are playing for example - in a single file.

## 8.1 Snapshot usage

A snapshot is one file containining the complete emulator state. A snapshot file can be generated by selecting the "Save snapshot" command at any time. This will pop up a requester from which you can specify whether the snapshot should also contain the disk and ROM status.

A snapshot file can be used to restore the emulator state by selecting the `load snapshot` menu entry at any time. Unfortunately attached ROM images/cartridges are only supported in the VIC20, the PET and the CBM-II emulators at this time.

The memory configuration of the emulator is saved in the snapshot file as well. This configuration is restored when the snapshot is loaded.

A quick snapshot can now be made by pressing the `M-F11` key and reloaded by pressing the `M-F10` key.

## 8.2 Snapshot format

A snapshot file consists of several modules of mostly different types. Each module has a name and saves the state of an entity like a CIA, the CPU, or the memory.

### 8.2.1 Emulator modules

This section lists the modules that are contained in each of the emulators snapshot files.

#### 8.2.1.1 x64 modules

The modules in the x64 emulator are:

@multitable @columnfractions .1 .4 .5

- Name @tab Type @tab Description
- MAINCPU @tab 6502 @tab The Main CPU - although it is a 6510, only the 6502 core is saved here
- C64MEM @tab Memory @tab Holds the RAM contents of the C64. Also the CPU I/O register contents are saved here.
- C64ROM @tab ROM images @tab Dump of the system ROMs
- VIC-II @tab 656* @tab The VIC-II of the C64/128
- CIA1 @tab 6526 @tab The CIA for the interrupts and the keyboard
- CIA2 @tab 6526 @tab The CIA for the userport, IEC-bus and RS232.
- SID @tab 6581 @tab The SID sound chip of the C64/C128
- REU* @tab @tab The RAM Extension Unit state (optional)
- ACIA1 @tab 6551 @tab An ACIA (RS232 interface) at $DE00 (optional)
- TPI @tab 6525 @tab A TPI at $DF00 for a parallel IEEE488 interface (optional)
- * @tab Drive modules @tab The emulated drive(s) have their own modules see section 8.2.1.6 Drive modules Some of the modules are optional and are only saved if the specific feature is enabled at save-time. If the module is found when restoring the state the optional features are enabled, and disabled otherwise.

  #### 8.2.1.2 x128 modules

  The modules in the x128 emulator are:

  @multitable @columnfractions .1 .4 .5

- Name @tab Type @tab Description
- MAINCPU @tab 6502 @tab The Main CPU - although it is a 6510, only the 6502 core is saved here
- C128MEM @tab Memory @tab Holds the RAM contents of the C64. Also the CPU I/O register contents are saved here.
- C128ROM @tab ROM images @tab Dump of the system ROMs
- VIC-II @tab 656* @tab The VIC-II of the C64/128
- CIA1 @tab 6526 @tab The CIA for the interrupts and the keyboard
- CIA2 @tab 6526 @tab The CIA for the userport, IEC-bus and RS232.
- SID @tab 6581 @tab The SID sound chip of the C64/C128
- ACIA1 @tab 6551 @tab An ACIA at $DE00 (optional)
- TPI @tab 6525 @tab A TPI at $DF00 for a parallel IEEE488 interface (optional)
- * @tab Drive modules @tab The emulated drive(s) have their own modules see section 8.2.1.6 Drive modules Some of the modules are optional and are only saved if the specific feature is enabled at save-time. If the module is found when restoring the state the optional features are enabled, and disabled otherwise. Not yet supported are the 80 column video chip, cartridges and RAM expansion unit.

  #### 8.2.1.3 xvic modules

  The modules in the xvic emulator are:

  @multitable @columnfractions .1 .4 .5

- Name @tab Type @tab Description
- MAINCPU @tab 6502 @tab The Main CPU
- VIC20MEM @tab Memory @tab Holds the RAM contents of the VIC20.
- VIC20ROM @tab ROM images @tab Holds the ROM images of the VIC20, including possibly attached cartridges
- VIC-I @tab 656* @tab The VIC-I of the VIC20
- VIA1 @tab 6522 @tab The VIA for the interrupts and the keyboard
- VIA2 @tab 6522 @tab The VIA for the userport, IEC-bus and RS232.
- * @tab Drive modules @tab The emulated drive(s) have their own modules see section 8.2.1.6 Drive modules

  #### 8.2.1.4 xpet modules

  The modules in the xpet emulator are:

  @multitable @columnfractions .1 .4 .5

- Name @tab Type @tab Description
- MAINCPU @tab 6502 @tab The Main CPU
- PETMEM @tab Memory @tab Holds the RAM contents of the PET.
- PETROM @tab ROM images @tab Holds the ROM images of the PET, including possibly attached cartridges
- CRTC @tab 6545 @tab The CRTC of the PET. This is also included if it is a dump of a PET without CRTC, because the video state is saved here anyway.
- PIA1 @tab 6520 @tab The PIA for the interrupts, tape and the keyboard
- PIA2 @tab 6520 @tab The PIA for the IEEE488-bus
- VIA @tab 6522 @tab The VIA for IEEE488, userport, sound
- ACIA1 @tab 6551 @tab The ACIA for the SuperPET. This module is optional.
- * @tab Drive modules @tab The emulated drive(s) have their own modules see section 8.2.1.6 Drive modules

  #### 8.2.1.5 xcbm2 modules

  The modules in the xcbm2 emulator are:

  @multitable @columnfractions .1 .4 .5

- Name @tab Type @tab Description
- MAINCPU @tab 6502 @tab The Main CPU - although it is a 6509, only the 6502 core is saved here
- CBM2MEM @tab Memory @tab Holds the RAM contents of the CBM-II models. Also holds the exec-bank and indirection bank registers
- CBM2ROM @tab Memory @tab optional. Holds the ROM images.
- CRTC @tab 6545 @tab The video chip for the C6*0 and C7*0 models (only those models).
- VIC-II @tab 656? @tab The video chip for the C5*0 models (only the C5*0 models).
- CIA1 @tab 6526 @tab The CIA for IEEE 488 and userport.
- TPI1 @tab 6525 @tab TPI 1 for IEEE488
- TPI2 @tab 6525 @tab TPI 2 for interrupts and keyboard.
- ACIA1 @tab 6551 @tab The RS232 interface
- SID @tab 6581 @tab The CBM2s SID sound chip
- * @tab Drive modules @tab The emulated drive(s) have their own modules see section 8.2.1.6 Drive modules The snapshot either contains CRTC or VIC-II snapshot modules, but not both. Depending on which module is found, a C5*0 or C6*0/C7*0 is emulated.

  #### 8.2.1.6 Drive modules

  The modules for the real disk drive emulation are included in the emulator when the emulation is enabled during the writing of the snapshot.

  @multitable @columnfractions .1 .4 .5

- Name @tab Type @tab Description
- *CPU @tab 6502 @tab The Drive 0 CPU
- * @tab * @tab *

  ### 8.2.2 Module formats

  This section shows the basic module framework and the contents of the different types of modules.

  The single chip modules contain the chip state, not the state of the emulator. We tried to make the format as implementation-independent as possible, to allow reuse of snapshots in later versions of this emulator, or even in other emulators.

  #### 8.2.2.1 Terminology

  In this section we use certain abbreviations to define the types of the data saved in the snapshot.

  `BYTE`
    8 bit integer.
  `WORD`
    16 bit integer. Saved with low-byte first, high-byte last.
  `DWORD`
    32 bit integer. Saved with low-word first, then high-word. Each word saved with its low-byte first.
  `ARRAY`
    Array of BYTE values. Length depends on the description.

  The tables for the single modules state the type, name and description of the data saved in the modules. The data is saved in the order it is in the tables, so no offset is given.

  #### 8.2.2.2 Module framework

  The VICE snapshot file starts with the magic string and includes the fileformat version number.

  @multitable @columnfractions .1 .4 .5

- Type @tab Name @tab Description
- 19 BYTE @tab MAGIC @tab "VICE Snapshot File\032", padded with 0
- BYTE @tab VMAJOR @tab fileformat major version number
- BYTE @tab VMINOR @tab fileformat minor version number
- 16 BYTE @tab MACHINENAME @tab Name of emulated machine, like "PET", "CBM-II", "VIC20", "C64" or "C128". zerobyte-padded. The file header is followed by a number of different snapshot modules. Each module has a header with the information given in the table below. The header includes two version numbers, VMAJOR and VMINOR. Modules with the same VMAJOR should be able to be exchanged. I.e. higher VMINOR numbers only append to the data for lower VMINOR. This additional data is ignored by older restore routines. The other way around newer restore routines must accept the fewer info from lower VMINOR dumps. Changes in VMAJOR might introduce any incompatibility you like, but that's what VMAJOR is for after all :-) @multitable @columnfractions .1 .4 .5
- Type @tab Name @tab Description
- 16 BYTE @tab MODULENAME @tab The name of the module in ASCII, padded with 0 to 16 byte.
- BYTE @tab VMAJOR @tab major version number
- BYTE @tab VMINOR @tab minor version number
- DWORD @tab SIZE @tab size of the module, not including this header

  #### 8.2.2.3 CPU module

  This module saves the core 6502 state. You will find a clock value there. All other modules save their own clock values relative to this value. However, the drive modules save their clocks relative to their appropriate CPUs of course.

  Warning: This module is still under construction and saves some information that is not sure to be VICE-independent. If in doubt, read the source.

  @multitable @columnfractions .1 .4 .5

- Type @tab Name @tab Description
- DWORD @tab CLK @tab the current CPU clock value. All other clock values are relative to this.
- BYTE @tab AC @tab Accumulator
- BYTE @tab XR @tab X index register
- BYTE @tab YR @tab Y index register
- BYTE @tab SP @tab Stack Pointer
- WORD @tab PC @tab Programm Counter
- BYTE @tab ST @tab Status Registers
- DWORD @tab LASTOPCODE @tab ?
- DWORD @tab IRQCLK @tab absolute CLK when the IRQ line came active
- DOWRD @tab NMICLK @tab absolute CLK when the NMI line came active
- DWORD @tab ? @tab ?
- DWORD @tab ? @tab ?

  #### 8.2.2.4 CIA module

  The CIA 6526 is an I/O port chip with 2 8-bit I/O ports, a shift register, two timers, a Time of Day clock and interrupts.

  Version numbers: Major 1, Minor 1.

  @multitable @columnfractions .1 .4 .5

- Type @tab Name @tab Description
- BYTE @tab ORA @tab Output register A
- BYTE @tab ORB @tab Output register B
- BYTE @tab DDRA @tab Data direction register A
- BYTE @tab DDRB @tab Data direction register B
- WORD @tab TAC @tab Timer A counter value
- WORD @tab TBC @tab Timer B counter value
- BYTE @tab TOD_TEN @tab Time of Day - current tenth of second
- BYTE @tab TOD_SEC @tab Time of Day - current seconds
- BYTE @tab TOD_MIN @tab Time of Day - current minutes
- BYTE @tab TOD_HR @tab Time of Day - current hours
- BYTE @tab SDR @tab contents of shift register
- BYTE @tab IER @tab mask of enabled interrupt masks
- BYTE @tab CRA @tab Control register A
- BYTE @tab CRB @tab Control register B
- WORD @tab TAL @tab Timer A latch value
- WORD @tab TBL @tab Timer B latch value
- BYTE @tab IFR @tab mask of currently active interrupts
- BYTE @tab PBSTATE @tab Bit 6/7 reflect the PB6/7 toggle bit state. Bit 2/3 reflect the corresponding port bit state.
- BYTE @tab SRHBITS @tab number of half-bits to still shift in/out SDR
- BYTE @tab ALARM_TEN @tab Time of Day - alarm tenth of second
- BYTE @tab ALARM_SEC @tab Time of Day - alarm seconds
- BYTE @tab ALARM_MIN @tab Time of Day - alarm minutes
- BYTE @tab ALARM_HR @tab Time of Day - alarm hours
- BYTE @tab READICR @tab current clock minus the clock when ICR was read last plus 128.
- BYTE @tab TODLATCHED @tab Bit 0: 1= latched for reading, Bit 1: 2=stopped for writing
- BYTE @tab TODL_TEN @tab Time of Day - latched tenth of second
- BYTE @tab TODL_SEC @tab Time of Day - latched seconds
- BYTE @tab TODL_MIN @tab Time of Day - latched minutes
- BYTE @tab TODL_HR @tab Time of Day - latched hours
- DWORD @tab TOD_TICKS @tab clk ticks till next tenth of second
- -- @tab -- @tab The next items have been added in V1.1
- WORD @tab TASTATE @tab The state bits of the CIA timer A, according to ciatimer.h
- WORD @tab TBSTATE @tab The state bits of the CIA timer B, according to ciatimer.h The last two items have been added in CIA snapshot version 1.1 due to the improved CIA emulation in the newer VICE versions. Some state bits correspond to the CIA state as described in the "A Software Model of the CIA 6526" document by Wolfgang Lorenz, some are delayed versions. For more read the source file `ciatimer.h`.

  #### 8.2.2.5 VIA module

  The VIA 6522 is the predecessor of the CIA and also an I/O port chip with 2 8-bit I/O ports, a shift register, two timers and interrupts.

  Version numbers: Major 1, Minor 0.

  @multitable @columnfractions .1 .4 .5

- Type @tab Name @tab Description
- BYTE @tab ORA @tab Output register A
- BYTE @tab DDRA @tab Data direction register A
- BYTE @tab ORB @tab Output register B
- BYTE @tab DDRB @tab Data direction register B
- WORD @tab T1L @tab Timer 1 Latch value
- WORD @tab T1C @tab Timer 1 counter value
- BYTE @tab T2L @tab Timer 2 latch (8 bit as only lower byte is used)
- WORD @tab T2C @tab Timer 2 counter value
- BYTE @tab RUNFL @tab bit 7: timer 1 will generate IRQ on underflow; bit 6: timer 2 will generate IRQ on underflow
- BYTE @tab SR @tab Shift register value
- BYTE @tab ACR @tab Auxiliary control register
- BYTE @tab PCR @tab Peripheral control register
- BYTE @tab IFR @tab active interrupts
- BYTE @tab IER @tab interrupt mask
- BYTE @tab PB7 @tab bit 7 = pb7 state
- BYTE @tab SRHBITS @tab number of half-bits to shift out on SR
- BYTE @tab CABSTATE @tab bit 7: state of CA2 pin, bit 6: state of CB2 pin
- BYTE @tab ILA @tab Port A Input Latch (see ACR bit 0)
- BYTE @tab ILB @tab Port B Input Latch (see ACR bit 1)

  #### 8.2.2.6 PIA module

  The PIA 6520 is a chip with two I/O ports (Parallel Interface Adapter) and four additional handshake lines. The chip is pretty the same for Port A and B, only that Port A implements handshake on read operation and port B on write operation.

  Version numbers: Major 1, Minor 0.

  @multitable @columnfractions .1 .4 .5

- Type @tab Name @tab Description
- UBYTE @tab ORA @tab Output register A
- UBYTE @tab DDRA @tab Data Direction Register A
- UBYTE @tab CTRLA @tab Control Register A
- UBYTE @tab ORB @tab Output register B
- UBYTE @tab DDRB @tab Data Direction Register B
- UBYTE @tab CTRLB @tab Control Register B
- UBYTE @tab CABSTATE @tab Bit 7 = state of CA2, Bit 6 = state of CB2

  #### 8.2.2.7 TPI module

  The TPI 6525 is a chip with three I/O ports (Tri-Port-Interface). One of the ports can double as an interrupt prioritizer. Therefore we also have to save the states of the interrupt stack etc.

  Version numbers: Major 1, Minor 0.

  @multitable @columnfractions .1 .4 .5

- Type @tab Name @tab Description
- BYTE @tab PRA @tab Port A output register
- BYTE @tab PRB @tab Port B output register
- BYTE @tab PRC @tab Port C output register (doubles as IRQ latch register)
- BYTE @tab DDRA @tab Port A data direction register
- BYTE @tab DDRB @tab Port B data direction register
- BYTE @tab DDRC @tab Port C data direction register (doubles as IRQ mask register)
- BYTE @tab CR @tab Control Register
- BYTE @tab AIR @tab Active interrupt register
- BYTE @tab STACK @tab Interrupt stack - the interrupt bits that are not (yet) served.
- BYTE @tab CABSTATE @tab State of CA/CB pins. Bit 7 = state of CA, Bit 6 = state of CB

  #### 8.2.2.8 RIOT module

  The RIOT 6532 is a chip with two I/O ports, some RAM and a Timer. The chip contains 128 byte RAM, but the RAM is not saved in the RIOT snapshot, but in the memory section.

  Warning: This module is still under construction

  Version numbers: Major 0, Minor 0.

  @multitable @columnfractions .1 .4 .5

- Type @tab Name @tab Description
- BYTE @tab ORA @tab Port A output register
- BYTE @tab DDRA @tab Port A data direction register
- BYTE @tab ORB @tab Port B output register
- BYTE @tab DDRB @tab Port B data direction register
- BYTE @tab EDGECTRL @tab Bit 0/1: A0/A1 address bits written to edgecontrol registers
- BYTE @tab IRQFL @tab Bit 6/7: A6/A7 IRQ flag register. Bit 0: state of the IRQ line (0=inactive, 1=active)
- BYTE @tab N @tab timer value
- WORD @tab DIVIDER @tab Pre-scale divider value (1, 8, 64, or 1024)
- WORD @tab REST @tab cycles since the last counter change
- BYTE @tab IRQEN @tab Bit 0: 0= timer IRQ disabled, 1= timer IRQ enabled

  #### 8.2.2.9 SID module

  TODO

  #### 8.2.2.10 ACIA module

  The ACIA 6551 is an RS232 interface chip. VICE emulates RS232 connections via `/dev/ttyS*` (Unix) or `COM:` (DOS/WIN - not yet?). When saving a snapshot, those connections are of course lost. The state of the ACIA however is restored if possible. I.e. if a connection is already open when restoring the snapshot, this connection is used instead. If no connection is open, a carrier/DTR drop is emulated.

  Version numbers: Major 1, Minor 0.

  @multitable @columnfractions .1 .4 .5

- Type @tab Name @tab Description
- BYTE @tab TDR @tab Transmit Data Register
- BYTE @tab RDR @tab Receiver Data Register
- BYTE @tab SR @tab Status Register
- BYTE @tab CMD @tab Command Register
- BYTE @tab CTRL @tab Ctrl Register
- BYTE @tab INTX @tab 0 = no data to tx; 1 = Data is being transmitted; 2 = Data is being transmitted while data in TDR waiting to be put to internal transmit register
- DWORD @tab TICKS @tab Clock ticks till the next TDR empty interrupt

  #### 8.2.2.11 VIC-I module

  TODO

  #### 8.2.2.12 VIC-II module

  TODO

  #### 8.2.2.13 CRTC module

  Warning: After VICE version 1.0 the CRTC emulation has improved considerably. Especially it is now cycle exact. Therefore a lot more variables must be saved. The snapshot module version jumped from 0.0 to 1.0. Newer versions of VICE can read the old snapshots, but older versions (1.0 and below) cannot read the new snapshots.

  Warning: This module is still under construction. Especially the RASTERY and RASTERLINE values might be bogus.

  Version numbers: Major 1, Minor 0.

  @multitable @columnfractions .1 .4 .5

- Type @tab Name @tab Description
- @tab @tab Hardware options
- WORD @tab VADDR_MASK @tab Mask of the address bits valid when accessing the video memory
- WORD @tab VADDR_CHARSWITCH @tab If one bit in the video address is used to switch the character generator, it is masked here.
- WORD @tab VADDR_CHAROFFSET @tab The offset in characters in the character generator that CHARSWITCH switches.
- WORD @tab VADDR_REVSWITCH @tab If one bit in the video address inverts the screen, it is masked here. If > 0 then must be set for standard; if < 0 then inverted bit must not be set.
- WORD @tab CHARGEN_MASK @tab size of character generator in byte - 1
- WORD @tab CHARGEN_OFFSET @tab offset given by external circuitry
- BYTE @tab HW_CURSOR @tab external hardware cursor circuitry enabled
- BYTE @tab HW_COLS @tab number of displayed columns during one character clock cycle
- BYTE @tab HW_BLANK @tab set if the hardware blank feature is available
- @tab @tab CRTC register
- 20 BYTE @tab REGISTERS @tab register DUMP of the CRTC registers 0-19.
- @tab @tab CRTC internal registers
- BYTE @tab REGNO @tab The current index in the CRTC register file
- BYTE @tab CHAR @tab The current cycle within the current rasterline
- BYTE @tab CHARLINE @tab The current character line
- BYTE @tab YCOUNTER @tab The current rasterline in the character
- BYTE @tab CRSRCNT @tab Framecounter for the blinking cursor
- BYTE @tab CRSRSTATE @tab if set the hardware cursor is visible
- BYTE @tab CRSRLINES @tab set if ycounter is within the active cursor rasterlines for a char
- WORD @tab CHARGEN_REL @tab relative base of currently used character generator in ROM (in byte)
- WORD @tab SCREEN_REL @tab screen address to load the counter at the beginning of the next rasterline
- WORD @tab VSYNC @tab number of rasterlines left within vsync; 0 = not in vsync
- BYTE @tab VENABLE @tab vertical enable flipflop; 1= display, 0= blank.
- @tab @tab (VICE-dependent?) variables
- WORD @tab SCREEN_WIDTH @tab width of the current display window
- WORD @tab SCREEN_HEIGHT @tab height of the current display window
- WORD @tab SCREEN_XOFFSET @tab x position where the first character in a line starts in the window...
- WORD @tab HJITTER @tab ...but only after adding this jitter
- WORD @tab SCREEN_YOFFSET @tab x position where the first character in a line starts in the window...
- WORD @tab FRAMELINES @tab expected number of rasterlines for the current frame
- WORD @tab CURRENT_LINE @tab current rasterline as seen from the CRTC Here is the reference for the previous CRTC snapshot module. It is outdated and should not be used anymore. Version numbers: Major 0, Minor 0. @multitable @columnfractions .1 .4 .5
- Type @tab Name @tab Description
- BYTE @tab RASTERY @tab The number of clock cycles from rasterlines start
- WORD @tab RASTERLINE @tab The current rasterline
- WORD @tab ADDRMASK @tab The address mask valid for the CRTC. All memory accesses are masked with this value
- BYTE @tab HWFLAG @tab Bit 0: 1= hardware cursor available. Bit 1: 1= number of columns is doubled by external hardware
- 20 BYTE @tab REGISTERS @tab register DUMP of the CRTC registers 0-19.
- BYTE @tab CRSRSTATE @tab Hardware cursor: Bits 0-3: frame counter till next crsr line toggle. Bit 7: 1= cursor line active

  #### 8.2.2.14 C64 memory module

  The C64 memory module actually consists of two modules. The "C128MEM" module is mandatory and contains the RAM dump. The "C64ROM" module is optional and contains a dump of the ROM images.

  The size of the C64 memory modules differs with each different memory configuration. The RAM configuration is saved in the snapshot, and restored when the snapshot is loaded. The attached cartridges are not yet(!) saved and not yet restored upon load.

  Version numbers: Major 0, Minor 0

  The C64MEM module

  @multitable @columnfractions .1 .4 .5

- Type @tab Name @tab Description
- BYTE @tab CPUDATA @tab CPU port data byte
- BYTE @tab CPUDIR @tab CPU port direction byte
- BYTE @tab EXROM @tab state of the EXROM line (?)
- BYTE @tab GAME @tab state of the GAME line (?)
- ARRAY @tab RAM @tab 64k RAM dump The C64ROM module @multitable @columnfractions .1 .4 .5
- Type @tab Name @tab Description
- ARRAY @tab KERNAL @tab 8k dump of the kernal ROM
- ARRAY @tab BASIC @tab 8k dump of the basic ROM
- ARRAY @tab CHARGEN @tab 4k dump of the chargen ROM

  #### 8.2.2.15 C128 memory module

  The C128 memory module actually consists of two modules. The "C128MEM" module is mandatory and contains the RAM dump. The "C128ROM" module is optional and contains a dump of the ROM images.

  The size of the C128 memory modules differs with each different memory configuration. The RAM configuration is saved in the snapshot, and restored when the snapshot is loaded. The attached cartridges are also restored upon load if they have been saved in the snapshot.

  Version numbers: Major 0, Minor 0

  The C128MEM module

  @multitable @columnfractions .1 .4 .5

- Type @tab Name @tab Description
- 12 BYTE @tab MMU @tab dump of the 12 MMU registers
- ARRAY @tab RAM @tab 128k RAM dump banks 0 and 1 The C128ROM module @multitable @columnfractions .1 .4 .5
- Type @tab Name @tab Description
- ARRAY @tab KERNAL @tab 8k dump of the kernal ROM
- ARRAY @tab BASIC @tab 32k dump of the basic ROM
- ARRAY @tab EDITOR @tab 4k dump of the editor ROM
- ARRAY @tab 4k CHARGEN @tab dump of the chargen ROM

  #### 8.2.2.16 VIC20 memory module

  The VIC20 memory module actually consists of two modules. The "VIC20MEM" module is mandatory and contains the RAM dump. The "VIC20ROM" module is optional and contains a dump of the ROM images.

  The size of the VIC20 memory modules differs with each different memory configuration. The RAM configuration is saved in the snapshot, and restored when the snapshot is loaded. The attached cartridges are also restored upon load if they have been saved in the snapshot.

  The VIC20MEM module

  Version numbers: Major 1, Minor 0

  @multitable @columnfractions .1 .4 .5

- Type @tab Name @tab Description
- BYTE @tab CONFIG @tab Configuration register. Bits 0,1,2,3,5 reflect if the corresponding memory block is RAM (bit=1) or not (bit=0).
- ARRAY @tab RAM0 @tab 1k RAM dump $0000-$03ff
- ARRAY @tab RAM1 @tab 4k RAM dump $1000-$1fff
- ARRAY @tab COLORRAM @tab 2k Color RAM, $9400-$9bff
- ARRAY @tab BLK0 @tab if CONFIG & 1 then: 3k RAM dump $0400-$0fff
- ARRAY @tab BLK1 @tab if CONFIG & 2 then: 8k RAM dump $2000-$3fff
- ARRAY @tab BLK2 @tab if CONFIG & 4 then: 8k RAM dump $4000-$5fff
- ARRAY @tab BLK3 @tab if CONFIG & 8 then: 8k RAM dump $6000-$7fff
- ARRAY @tab BLK5 @tab if CONFIG & 32 then: 8k RAM dump $a000-$bfff The VIC20ROM module Version numbers: Major 1, Minor 1 @multitable @columnfractions .1 .4 .5
- Type @tab Name @tab Description
- BYTE @tab CONFIG @tab Bit 0: 1= ROM block $2*** enabled. Bit 1: 1= ROM block $3*** enabled. Bit 2: 1= ROM block $4*** enabled. Bit 3: 1= ROM block $5*** enabled. Bit 4: 1= ROM block $6*** enabled. Bit 5: 1= ROM block $7*** enabled. Bit 6: 1= ROM block $A*** enabled. Bit 7: 1= ROM block $B*** enabled.
- ARRAY @tab KERNAL @tab 8k KERNAL ROM image $e000-$ffff
- ARRAY @tab BASIC @tab 16k BASIC ROM image $c000-$dfff
- ARRAY @tab CHARGEN @tab 4k CHARGEN ROM image
- ARRAY @tab BLK1A @tab 4k ROM image $2*** (if CONFIG & 1)
- ARRAY @tab BLK1B @tab 4k ROM image $3*** (if CONFIG & 2)
- ARRAY @tab BLK3A @tab 4k ROM image $6*** (if CONFIG & 16)
- ARRAY @tab BLK3B @tab 4k ROM image $7*** (if CONFIG & 32)
- ARRAY @tab BLK5A @tab 4k ROM image $A*** (if CONFIG & 64)
- ARRAY @tab BLK5B @tab 4k ROM image $B*** (if CONFIG & 128)
- ARRAY @tab BLK2A @tab 4k ROM image $4*** (if CONFIG & 4; added in V1.1)
- ARRAY @tab BLK2B @tab 4k ROM image $5*** (if CONFIG & 8; added in V1.1)

  #### 8.2.2.17 PET memory module

  The PET memory module actually consists of two modules. The "PETMEM" module is mandatory and contains the RAM dump. The "PETROM" module is optional and contains a dump of the ROM images.

  The size of the PET memory modules differs with each different memory configuration. The RAM configuration is saved in the snapshot, and restored when the snapshot is loaded.

  The PETMEM module

  Version numbers: Major 1, Minor 2

  @multitable @columnfractions .1 .4 .5

- Type @tab Name @tab Description
- BYTE @tab CONFIG @tab Configuration value. Bits 0-3: 0= 40 col PET without CRTC; 1= 40 col PET with CRTC; 2 = 80 col PET (with CRTC); 3= SuperPET; 4= 8096; 5= 8296. Bit 6: 1= RAM at $9***. Bit 7: 1= RAM at $A***.
- BYTE @tab KEYBOARD @tab Keyboard type. 0= UK business; 1= Graphics; 2= German business
- BYTE @tab MEMSIZE @tab memory size of low 32k in k (possible values 4, 8, 16, 32)
- BYTE @tab CONF8X96 @tab Value of the 8x96 configuration register
- BYTE @tab SUPERPET @tab SuperPET config. Bit 0: 1= $9*** RAM enabled. Bit 1: 1= RAM write protected. Bit 2: 1= CTRL register write protected. Bit 3: 0= DIAG pin active. Bits 4-7: RAM block in use.
- ARRAY @tab RAM @tab 4-32k RAM (not 8296, size depends on MEMSIZE)
- ARRAY @tab VRAM @tab 2/4k RAM (not 8296, size depends on CONFIG)
- ARRAY @tab EXTRAM @tab 64k expansion RAM (SuperPET and 8096 only)
- ARRAY @tab RAM @tab 128k RAM (8296 only)
- -- @tab -- @tab The following item has been added in V1.1
- BYTE @tab POSITIONAL @tab bit 0=0 = symbolic keyboard mapping, bit 0=1 = positional mapping.
- -- @tab -- @tab The following item has been added in V1.1
- BYTE @tab EOIBLANK @tab bit 0=0 = EOI does not blank screen, bit 0=1 = EOI blanks screen. The last item has been added in PETMEM snapshot version 1.1. It is ignored by earlier restore routines (V1.0) and the V1.1 restore routines do not change the current setting when reading a V1.0 snapshot. In V1.2 the new EOIBLANK variable has been added. This implements the "blank screen on EOI" feature that was previously linked to a wrong resource. The PETROM module Version numbers: Major 1, Minor 0 @multitable @columnfractions .1 .4 .5
- Type @tab Name @tab Description
- BYTE @tab CONFIG @tab Bit 0: 1= $9*** ROM included. Bit 1: 1= $A*** ROM included. Bit 2: 1= $B*** ROM included. Bit 3: 1= $e900-$efff ROM included
- ARRAY @tab KERNAL @tab 4k KERNAL ROM image $f000-$ffff
- ARRAY @tab EDITOR @tab 2k EDITOR ROM image $e000-$e7ff
- ARRAY @tab CHARGEN @tab 2k CHARGEN ROM image
- ARRAY @tab ROM9 @tab 4k $9*** ROM image (if CONFIG & 1)
- ARRAY @tab ROMA @tab 4k $A*** ROM image (if CONFIG & 2)
- ARRAY @tab ROMB @tab 4k $B*** ROM image (if CONFIG & 4)
- ARRAY @tab ROMC @tab 4k $C*** ROM image
- ARRAY @tab ROMD @tab 4k $D*** ROM image
- ARRAY @tab ROME9 @tab 7 blocks $e900-$efff ROM image (if CONFIG & 8)

  #### 8.2.2.18 CBM-II memory module

  The CBM-II memory module actually consists of two modules. The "CBM2MEM" module is mandatory and contains the RAM dump. The "CBM2ROM" module is optional and contains a dump of the ROM images.

  The size of the CBM-II memory modules differs with each different memory configuration. The RAM configuration is saved in the snapshot, and restored when the snapshot is loaded.

  Version numbers: Major 1, Minor 0

  The CBM2MEM module

  @multitable @columnfractions .1 .4 .5

- Type @tab Name @tab Description
- UBYTE @tab MEMSIZE @tab Memory size in 128k blocks (1=128k, 2=256k, 4=512k, 8=1024k)
- UBYTE @tab CONFIG @tab Bit 0 = $f0800-$f0fff RAM, Bit 1 = $f1000-$f1fff RAM, Bit 2 = $f2000-$f3fff RAM, Bit 3 = $f4000-$f5fff RAM, Bit 4 = $f6000-$f7fff RAM, Bit 5 = $fc000-$fcfff RAM
- UBYTE @tab HWCONFIG @tab Bit 0: 0 = CRTC, 1 = VIC-II video chip (Basically the destinction between C500 and C600/700)
- UBYTE @tab EXECBANK @tab CPUs execution bank register
- UBYTE @tab INDBANK @tab CPUs indirection bank register
- ARRAY @tab SYSRAM @tab 2k system RAM $f0000-$f07ff
- ARRAY @tab VIDEO @tab 2k video RAM $fd000-$fd7ff
- ARRAY @tab RAM @tab RAM dump, size according to MEMSIZE
- ARRAY @tab RAM08 @tab if memsize < 1M and CONFIG & 1 : 2k RAM $f0800-$f0fff
- ARRAY @tab RAM1 @tab if memsize < 1M and CONFIG & 2 : 4k RAM $f1000-$f1fff
- ARRAY @tab RAM2 @tab if memsize < 1M and CONFIG & 4 : 8k RAM $f2000-$f3fff
- ARRAY @tab RAM4 @tab if memsize < 1M and CONFIG & 8 : 8k RAM $f4000-$f5fff
- ARRAY @tab RAM6 @tab if memsize < 1M and CONFIG & 16 : 8k RAM $f6000-$f7fff
- ARRAY @tab RAMC @tab if memsize < 1M and CONFIG & 32 : 4k RAM $fc000-$fcfff The RAM* arrays are only saved if the RAM itself is less than 1M. If the memory size is 1M then those areas are taken from the bank 15 area of the normal RAM. The CBM2ROM module @multitable @columnfractions .1 .4 .5
- Type @tab Name @tab Description
- UBYTE @tab CONFIG @tab Bit 1: 1= $1*** ROM image included. Bit 2: 1= $2000-$3fff ROM image included. Bit 3: 1= $4000-$5fff ROM image included. Bit 4: 1= $6000-$7fff ROM image included.
- ARRAY @tab KERNAL @tab 8 KERNAL ROM image ($e000-$efff)
- ARRAY @tab BASIC @tab BASIC ROM image ($8000-$bfff)
- ARRAY @tab CHARGEN @tab 4k CHARGEN ROM image
- ARRAY @tab ROM1 @tab 4k cartridge ROM image for $1*** (if CONFIG & 2)
- ARRAY @tab ROM2 @tab 8k cartridge ROM image for $2000-$3fff (if CONFIG & 4)
- ARRAY @tab ROM4 @tab 8k cartridge ROM image for $4000-$5fff (if CONFIG & 8)
- ARRAY @tab ROM6 @tab 8k cartridge ROM image for $6000-$7fff (if CONFIG & 16)

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