# The CPC472

The CPC472 is a modified Amstrad CPC464 released by Indescomp. Indescomp were the distributors of Amstrad computers in Spain.

Externally, the "CPC472" looks similar to the standard CPC464, except for some monitor differences:

- "CPC472" is written on the top of the keyboard case.
- CPC472 is written on the base
- there were two keyboard layouts: Spanish and English

Internally, there is a small sub-PCB which is connected by ribbon cables into the position that would be occupied by the 32K System ROM on the CPC464.

This document describes this sub-PCB, and hopefully it will be decided if the RAM can be used, and if it can, the access method.

The information in this document comes from Vicente Simon.

## Main PCB

Identification marks:

AMSTRAD COPYRIGHT 1984

PT NO. Z70200

## Sub-PCB

Identification: MS0043A

Sub-PCB part list:

ID | Type | Description
--- | --- | ---
IC103 | 40037 (TMS27C256) | 32K ROM (note 1)
IC126 | MN4164P | 64k x 1bit DRAM
IC127 | 74LS08 | Quad 2-Input NAND
IC128 | 74LS136 | Quad 2-Input Exclusive-OR

1. This is the system ROM and contains the firmware and BASIC. The identification of 40037 indicates a CPC System ROM modified for the Spanish market.
2. CD008 and CD009 are connection points between the sub-PCB and the main PCB. The connection is made by two strips of ribbon cable from the sub-PCB to the connection site on the PCB where the System ROM would be in a standard CPC464.

Drawing of the top of the sub-PCB:

Drawing of the bottom of the sub-PCB:

NOTE: I don't know if all these connections are correct because it is not easy to see the source/destination of some connections. Please e-mail me with corrections.

Signals to/from the sub-PCB:

Name | Function
--- | ---
D7-D0 | Data (note 1)
A14-A0 | Address (note 2)
/ROMDIS | ROM data output disable (note 3)
/ROMEN | ROM enable (note 4)
VCC | 5V D.C. power
GND | 0V D.C.

1. D7-D0 define the state of 8 data bits. When the ROM is enabled and selected it will output data onto the bus.
2. The ROM is physically a 32K ROM, but logically it is split into two 16K ROMs. The lower 16K contains the firmware and the upper 16K contains BASIC. When enabled, the lower 16K is visible in the address range &0000-&3FFF. In this case A14=0. When enabled, the upper 16K is visible in the address range &C000-&FFFF. In this case A14=1. Therefore A14 can be considered to select which 16K half of the ROM to output data from, with A13-A0 selecting the position within that half.
3. /ROMDIS is an 'active-low' signal which is connected directly to the expansion port. When 'low' the ROM is prevented from putting it's data onto the data-bus. This signal is used by ROM expansion boards.
4. /ROMEN is an 'active-low' signal generated by the Gate-Array. When low this indicates that the ROM is being accessed and it should output it's data onto the data-bus. /ROMEN is low in the following cases:
   - A14=0 and A15=0 and bit 1 of the Gate-Array ROM configuration register is 0.
   - A14=0 and A15=1 and bit 2 of the Gate-Array ROM configuration register is 0.

   It is not known if /RD,/WR,/IORQ are used to determine the state of /ROMEN.

These are the signals that are present on the ribbon cables which connect the sub-PCB to the main PCB.

Connections:

Connection point 1 | Connection point 2
--- | ---
74LS08 pin 14 (VCC) | MN4164P pin 9 (A7)
74LS08 pin 12 (A4) | MN4146P pin 10 (A5)
74LS08 pin 11 (Y4) | MN4164P pin 11 (A4)
74LS08 pin 10 (B3) | MN4164P pin 12 (A3)

## Part information

### 74LS08 - Quad 2-Input AND

Connection diagram of the 74LS08:

Truth table:

Inputs | Output
--- | ---
A | B
0 | 0 | 0
0 | 1 | 0
1 | 0 | 0
1 | 1 | 1

### 74LS136 - Quad 2-Input Exclusive-OR

Connection diagram of the 74LS136:

Truth table:

Inputs | Output
--- | ---
A | B
0 | 0 | 0
0 | 1 | 1
1 | 0 | 1
1 | 1 | 0