# I/O devices

Access to external devices is done using I/O commands of the CPU. (e.g. IN r,(C)/OUT (C),r)

When a I/O read or write operation is performed, A15-A0 contain the I/O address specified by the I/O instruction being executed by the CPU, /IORQ will be "0" and /M1 will be "1".

- If the operation is a read, /RD will be "0".
- If the operation is a write, /WR will be "0".

The I/O address is decoded by hardware using the states of one or more I/O address bits to generate a "select" for one or more devices.

An I/O addressess may be "fully" or "partially" decoded.

A "fully" decoded address will generate a "select" using the state of all bits from the I/O address. With a "fully" decoded address a device can only be selected using a single I/O address.

A "partially" decoded address will generate a "select" using the state of some of the bits from the I/O address. With a "partially" decoded address a device can be selected using many I/O addresses. e.g. a device could be selected when A0="0", the state of all other bits is ignored. Therefore this device can be selected using any I/O address with bit A0 set to "0".

The Amstrad uses "partially" decoded addressess. The CRTC is selected when A14="0".