# Introduction

This document describes a design for a modification which allows a CPC6128 to read both single and high density discs.

THIS modification has not been tested so may not work!

The CPC must have a SED9420C Data-Seperator.

# Parts list

1. 74LS74 (Flip/Flop)
2. Some TTL AND/OR gates (to be decided)

# Access details

I/O port &FA7F has been chosen. &FA7E is the recommended I/O port for floppy disc motor. Due to the partial decoding of the I/O ports &FA7F will also access floppy disc motor in unmodified CPC6128. It is known that some copyprotected software uses &FA7F instead of &FA7E to access floppy disc motor, so this modification may cause problems with that software. Maybe a re-design to cope with this is required?

Modification to CPC6128 possible. Modification to CPC+ requires more work.

Bit | Function
--- | ---
1 | selects clock to FDC. 0 = 4Mhz, 1 = 8Mhz
0 | selects MFM/FM. 0 = MFM, 1=FM. (MFM for double density and high density)

- On Reset, 4Mhz clock and MFM chosen so that configuration is the same as original CPC6128.
- For low density: bit 0 = 1, bit 1 = 0 (4Mhz clock, FM)
- For double density: bit 0 = 0, bit 1 = 0 (4Mhz clock, MFM) OR bit 0 = 1, bit 1 = 1 (8Mhz clock, FM)
- For high density: bit 0 = 0, bit 1 = 1. (8Mhz clock, MFM)

# Instructions

These have not been checked!!!

1. Cut input to CLK of FDC.
2. Connect CLK1 (pin 3) of SED9420 to CLK input of FDC.
3. Cut connection to MFM pin 10 of SED9420.
4. Connect /Q of one of the flip-flops from 74LS74 to MFM (pin 10) of SED9420.
5. Cut connection to MIN pin 11 of SED9420.
6. Connect /Q of other flip-flop of 74LS74 to MIN (pin 11) of SED9420.
7. Connect D0 to D of first flip flop.
8. Connect D1 to D of second flip flop.