Recent Changes to armasm (with effect from version 1.83 [Apr 29 1991])
========================

Changes to Version 2.21
-----------------------

A -via <file> option has been added, primarily for the PC hosting to get
around problems with the DOS command line limit of 127 characters.  Further
command line arguments are read in from <file>.


Changes to Version 2.20 [Sep 29 1993] (Release 1.6)
-------------------------------------

User visible changes:

 *  Previously some floating point data operation mnemonics with incorrect
    rounding and precision modes would be accepted.  armasm now reports all
    incorrect sufficies.

 *  Labels on the same line as a NOP instruction are now recognised.

 *  ARM7M long multiply instructions are now supported.  See the appropriate
    datasheet for details of their format.  In addition, decaof, armsd and
    armwd can now disassemble these instructions.

 *  A new -CPU target option has been added to inform armasm of the target
    CPU.  target may currently be one of ARM6, ARM7 or ARM7M.  If
    instructions are used which are not supported by the selected target CPU
    then armasm issues a warning to that effect.  This option is
    configurable.

 *  The '\' character, which can be used as the last character on a line to
    split long logical lines across several physical lines previously made
    the line number in diagnostic messages out of step.  This has been fixed.
 
 *  Under SunOS armasm would core dump when given the valid line:

        EXPORT  a_leaf_function[LEAF]

    This has now been fixed and works as expected.


Changes to Version 2.10 [Apr 30 1993] (Release 1.5)
-------------------------------------

Internal only changes:

 *  Literal pool management has been somewhat improved.

 *  Many minor source changes have been made to improve the safety with
    which enums are used and remove conflicts with C++.

User visible changes:

 *  "Immediate out of range" errors now include the value of the immediate
    which was out of range.  This is particularly useful when the value
    is a PC relative expression, such as a Label in an ADR or ADRL
    instruction.

 *  the KEEP directive now KEEPs not only code labels but data labels (ie.
    those in front of %, =, &, DCW, DCB, DCD).  In addition the -g option
    also causes local symbols to be passed to the linker.

 *  armasm -g when there is nothing to debug no longer causes a core dump.

 *  armasm -g now produces debugging tables which conform to the latest ARM
    Debugging Format Spec.  In particular, it now sets debugging item sizes
    to zero if they don't fit within 16-bits.

 *  -apcs options 2, R and U are now illegal.

 *  ADRL Rd, <expression>.  expression may now be a constant, and ADRL will
    attempt to construct it using precisely two data processing
    instructions.  This was previously supposed to be supported, but in fact
    wasn't.  A wider range of values can be dealt with than was previously
    the case.  However, expression may no longer be an external expression,
    ie, one which invloves labels defined in other areas.  This is because
    the instruction sequence relocation directive is currently inadequate to
    cope fully with such relocations.

 *  When armasm has worked out the filename of the output file or the listing
    file, the name is checked to see is it has an 's' extension, eg. foo.s If
    it does then armasm stops assembly with an appropriate warning, and does
    not overwrite the .s file.

 *  The '\' character can now be used to split a long logical line across
    several physical lines.  The line split counts as an arbitrary amount of
    white space to armasm, and so should not be used to split long quoted
    strings over several physical lines, as the amount of white space which
    will be inserted is not defined.  Indeed, using '\' to split a string
    produces an error message.

 *  LFM and SFM did not accept instructions of the form:

    %FM Fd, n, reg-or-pc-relative-expression
    
    Instead a complaint was made that a '[' was not found.
    This functionality has been added.  It should also be added to the
    assembler manual.  In addition,

    LDF{S,D} Fd, =<floating point number>
    
    works as expected, putting the floating point number in a literal pool.
    This useful feature is not documented, but is already supported by the
    assmbler, so it should be added to the documentation.

 *  :INDEX: applied to a PC relative expression always returned 0.

    This now gives an error saying that :INDEX: may not be applied to
    a pc relative expression.  This was thought preferable to returning
    the value  PC+8 - expression  because if the value produced by the
    :INDEX: were not used in the current location then it's value would
    not be incorrect.  Thus thi forces macro writers to be careful when
    dealing with pc relative expressions by using different code.

 *  A longstanding fault in the handling of conditional GETs has been fixed
    (conditionally skipped GETs were not skipped...). The diagnosis of
    missing ENDIFs, missing ENDs, etc, has been restored to its release 1.00
    health. Conditional LNKs are now faulted, as intended, and as prior to
    release 1.3.

 *  If an output file is not specified on the command line, and the source
    file has an 's' extension, then armasm now assumes that it was intended
    for the output file to have the same leaf name, but with an o or obj
    extension.  The default output file is always in the current directory.


Changes to Version 2.00 [Aug 24 1992]
-------------------------------------

Internal changes:

 *  Introduced message.h containing all user visible strings (including
    format strings) defined as macros.

 *  Introduced lprintf, replacing the externally visible WriteCh,
    WriteInteger, WriteCardinal, WriteHexCardinal in formatio.c

 *  Made externally visible eprintf internal only.  Removed externals
    file_warning, ErrorFile, Error, ErrorReport, Warning and AssemblerError
    with a single generic externally visible function Report, which can be
    passed variable arguments and a ReportType.  (see errors.h)

User visible changes:

 *  There is roughly a 9% speedup when assembling large files and producing
    a listing.

 *  If a label was found outside an AREA, a core dump would result.  This
    has been fixed so that it is an error which halts assembly.

 *  The operator "=" can now accept logical operands, so the expression
    
    fred = {TRUE}

    where fred is a logical variable is now legal.

 *  Error reporting has been enhanced, so that errors in files which have
    been included using GET or INCLUDE have an additional message specifying
    where the GET or INCLUDE directive occured.  A somewhat inadequate
    attempt was previously made to give this information, but only in a very
    few cases, eg. ASSERT directive failing.  Below is an example error with
    the new information.

    ARM AOF Macro Assembler vsn 2.00 (Advanced RISC Machines) [Sep 22 1992]
    Error: Assertion failed at line 5 in macro SILLY
     at line 3 in file test/get2
     included by GET/INCLUDE directive at line 8 in file "test/get1"
        5 00000000  ASSERT {TRUE} = {FALSE}
    Assembly terminated: 1 Error, 0 Warnings



Changes to Version 1.101 [Aug 11 1992] (Release 1.4)
--------------------------------------

Added warnings, and improved error messages due to use of MRS/MSR 
instructions in cases which the ARM6/60 datasheets warn about.

Instructions that only affect the control bits of the PSR.

MSR{cond} CPSR_ctl,<Op2>
MSR{cond} SPSR_ctl,<Op2>

Instructions that attempt to write an 8-bit immediate to the whole
of the PSR.

MSR{cond} CPSR,     #<expression>
MSR{cond} CPSR_all, #<expression>
MSR{cond} SPSR,     #<expression>
MSR{cond} SPSR_all, #<expression>

Also, MRS/MSR instructions assembled in 26 bit mode result in
warnings rather than errors.


Perfect hashing of opcodes and directives replaced by static arrays
and binary chop lookup (turns out to be slightly faster as well as
more maintainable).


Top Bit set characters in the source code no longer result in a
"Bad Character" error, but are treated as normal characters.


Branches into and out of Absolute areas now produce the correct
relocation directives, and symbols with the correct attributes.


New built in variable {ENDIAN} has the value "big" if the assembler is
in big-endian mode and the value "little" if the assmebler is in
little-endian mode.
 


Changes to Version 1.99 [May 18 1992]
-------------------------------------

Fix 2 faults in literal poool handling and a byte-order fault in DCW.

armasm vsn 1.98 halts with an internal fault mesage if a literal cannot be
addressed because no literal pool is within addressing range (+-4KB). A more
sensible diagnistic is now given.

Because of a programming fault in armasm vsn 1.98, a forward-defined
literal value can be re-defined during pass 2 in an already dumped, and
hence immutable, literal pool. This causes references to address literals
and their associated relocation directives, to simply vanish. This serious
fault can only afflict sources with multiple literal pools (those using
LTORG).

In all versions of armasm prior to 1.99, the DCW directive outputs the 2
bytes it generates in little-endian order, regardless of the byte order
specified for the assembly.



Changes to Version 1.98 [Apr 13 1992] (Release 1.3)
-------------------------------------

A long-standing fault in literal pool management has been fixed. It arose in
the presence of multiple literal pools from which literals had been omitted
because of the optimisation of LDR Rx, =Thing to MOV Rx, #Thing. When this
was visible during pass 2, but not pass 1 (forward definition of Thing...),
all literals following the elided =Thing shuffled up the literal pool,
introducing a padding word at the end and, potentially, invalidating a
following backward reference to any moved literal that was at the limit of
addressability (-0xffc).

This problem, never before seen in hand-written assembly language was found
to be quite common in certain machine-generated programs.

A '*' in column 1 now denotes a comment (Motorola convention). No legal
statement can begin with a '*'.

The omission of the 'END' directive at the end of a file is no longer fatal
in the usual case (no open macros or conditionals). A warning message is
still generated, however.

GET/INCLUDE directives may now be conditional. Previously this was
forbidden, for reasons we cannot fathom.

A SWI instruction may now take an external expression as an argument. Thus
the SWI number may be bound at link time rather than assembly time. This is
of very limited utility, but seems harmless and was requested by a customer.

The 'C' notation for hexadecimal numbers is now allowed as well as the '&'
notation. Thus 0xfc000003 is now as acceptable as &fc000003.

ADR/ADRL may no longer take an external expression as argument as this
confuses the linker. Note that ADR <external expression> is a recent (and
misguided) addition to armasm.

Help info is now put to stdout, not stderr, in deference to the PC (on which
stdout, but not stderr, can be re-directed).

A new keyword, -Errors <file>, allows stderr to be re-directed to a file.
This allows users of PC-hosted versions to collect diagnostic messages in a
file.



Changes to Version 1.97 [Mar 24 1992]
-------------------------------------

A branch (or BL) to a fixed destination from an absolutely based area was
(erroneously) subject to a relocation directive, with disastrous results.
Fixed in p2line.c, function P2LineHandler(), case Branch.



Changes to Version 1.97 [Feb 27 1992]
-------------------------------------

Checks for illegal instruction sequences were being applied over-
enthusiastically as follows:

 -  in non-CODE AREAs;
 -  to words generated by DCD;
 -  immediately following values generated by DCB, DCW.

The check is now applied only within CODE segments, to sequences of words
generated from instruction mnemonics.



Changes to Version 1.96 [Jan 28 1992]
-------------------------------------

Added support for the FP3 instructions NRM and URD. Also added new mnemonics
QMA and QML in anticipation of a future extension. For now they are synonyms
for MLA and MUL.



Changes to Version 1.95 [Jan 14 1992]
-------------------------------------

Fixed bugette whereby MRS ... spsr wasn't diagnosed properly, and silenetly
treated as MRS ... CPSR (case sensitivity). Now allow CPSR and SPSR in both
upper case and lower case (but not mixed case).

Fixed refusal of LFM... to accept F7 as a valid register (>= 7 where > 7 was
intended in p2line.c).

Added the boolena variable {REENTRANT} which has the value {TRUE} iff the
reentrant switch has been set.



Changes to Version 1.94 [Dec  4 1991] (Release 1.0)
-------------------------------------

Fixed bug intruduced int vsn 1.92 whereby LDRT Rx, [Ry] was marked
pre-increment. It MUST be post-increment.

Added a warning for LDR Rx, [Rx, ...]!, etc (dest == written-back base).



Changes to Version 1.93 [Nov 20 1991]
-------------------------------------

armasm is now configurable by the configure tool. The following can be set:
 -  target byte sex: little endian vs big endian vs host order (default);
 -  32 bit pc vs 26 bit pc (the default);
 -  no S/W stack check vs S/W stack check (the default);
 -  the page width for listings (default 79);
 -  the page length for listings (default 66).

IF, ELSE and ENDIF have been introduced as synonyms for [, | and ]. MAP is
now a synonym for ^.

The LEAF directive has been introduced as a variant of KEEP which marks the
kept symbol as a leaf symbol.

The -g option now accepts -gl and -ga, compatibly with cc, but warns of -gf
and -gv as being unsupported; -gxyz are warned of as not recognised.

Having re-discovered the :DEF: operator, pre-definition of symbols via SETA,
SETL and SETS has been fixed to set the 'defined on pass 2' flag. This is
very necessary.

A failing GET/INCLUDE directive now causes a diagnostic which gives the name
of the containing file and number of the containing line.



Changes to Version 1.92 [Nov  4 1991]
-------------------------------------

Names with leading '_'s no longer require enclosing '|'s.

The bug in v1.91 whereby armasm core-dumped on the next AREA directive
following a faulty AREA directive, has been fixed.

In all data transfer operations, the addressing mode xxx Rd, [Rb] no longer
sets the writeback bit (it is equivalent to [Rb, #0], not to [Rb], #0, as
might be more reasonably expected).

Use of writeback when pc is the base register now causes a warning for
floating point data transfer operations too.

A new built-in variable {CONFIG} is set to 26 during 26-bit pc operation and
to 32 during 32-bit pc operation (the operating mode can be set from the
command-line via -apcs 3/26bit or -apcs 3/32bit).

Use of MRS and MSR is warned of in 26-bit modes; use of TEQP etc. is warned
of in 32-bit modes.

The command line options -D - now allows 'make' dependency information to be
output to stdout rather than to a named file (allowing easier append-mode
redirection in some operating enviroments).

The support for armasm -g (generate line-number tables for armsd) has been
revised: it now works for any combination of host and target byte order.
Further, the behaviour is now in accord with Technical Specification "The
ARM Symbolic Debug Table Format".

Build-time options have been reviewed, revised (the ObjAsm variant is built
unless -DAAsm is specified; much conditionalization has been removed from
header files) and partly centralised in a new options.h file. Options not
moved there include those specific to Acorn hosts and targets (these
continue to be specifiable from the command line).



Changes to Version 1.91 [Aug 29 1991]
-------------------------------------

The code attribute of exported code symbols has been replaced by the dual
data attribute, which made more sense.

Access to banked registers following an in-line mode change is now warned
of. Access to a banked register following a fore-user-mode LDM is now
faulted.

A bug whereby a label in a based area on a line of its own did not get the
register-relative attribute has been fixed.

A bug in expression avaluation whereby, for a register-relative expression
Lab, 4+Lab did not generate a relocation directive while Lab+4 did, has been
fixed (failure to propagate the based flag from argument to result, save
when result re-used the argument).



Changes to Version 1.90 [Jul 22 1991]
-------------------------------------

Instruction mnemonics and directives have been made mostly case-insensitive:
they may now be given entirely in upper case or entirely in lower case, but
not in some mix of cases.

Support for release 3 of the ARM Procedure Call Standard has been added, as
follows. This includes support for the 32-bit-PC ARM (ARM6/60/600), release
3 of the floating-point struction set, reentrant code, and the passing of
floating-point arguments in floating-point registers.

Firstly, there are new AREA attributes AOF_32bitAT, AOF_REENTAT, AOF_FP3AT,
AOF_NOSWSTKCK and AOF_BASEDAT, and the attribute AOF_PICAT has been revised.
These are expressed as armasm AREA attributes as follows:

    AOF attribute               AREA attribute

    AOF_PICAT                   PIC
    AOF_REENTAT                 REENTRANT
                                  (also set in reentrant mode)
    AOF_32bitAT                 ***
    AOF_FP3AT                   +++ set if LFM or SFM are used
    AOF_NOSWSTKCK               ***

    AOF_BASEDAT                 BASED Rn

The PIC attribute marks a CODE AREA position-independent. It allows the
linker to assume the code will execute where loaded, without modification,
independently of where its static data (if any) is loaded.

The attributes with AREA attribute *** cannot be directly expressed, but
encode the mode in which the assembler operates. By default, the assembler
marks CODE areas as having been assembled for a 32-bit-PC ARM, with software
stack-limit checking and non-reentrant code. To alter these defaults, invoke
the assembler with the appropriate command-line flags: -apcs 3/opt/opt...
(see below). Note that these attributes do not affect the code assembled,
but allow the linker to diagnose potential problems if AREAs with
incompatible attributes are mixed at link time.

The AOF_FP3AT attribute cannot be set directly either. It is set if any
instruction from the release 3 floating-point instruction set, which is not
in the release 2 instruction set, is used. Currently, it is set if and only
if a LFM or SFM is used (Load/Store Floating Multiple instructions).

Secondly, a DATA area may be marked as BASED Rn (usually BASED sb). This
declares the area to the linker as an area containing a base-address
'constants', identifying a code area's static data. The corresponding code
area (usually given the REENTRANT attribute) addresses static data by
loading a static base address Rn- (usually sb-) -relative. Release 3 of the
ARM Procedure Call Standard specifies conventions for writing reentrant code
for the ARM, using sb (r9) as the static base register. Code which is both
reentrant and position-independent can be loaded into ROM and shared between
multiple clients.

A label defined within a BASED AREA becomes a register-relative expression
and can be used as an argument to an instruction such as LDR (c.f. labels
within CODE AREAs being PC-relative expressions). For example:

        AREA    |sb$$adcons|, DATA, BASED sb
HerStaticData
        DCD     HerDataSeg
MyStaticData
        DCD     DataSeg
        IMPORT  HerDataSeg
        ...

        AREA    MyData, DATA
MyStaticData
        ....

        AREA    MyCode, CODE, READONLY, REENTRANT
        ...
        LDR     r8, MyStaticData       ; locate my static data
                                       ; same as LDR r8, [sb, #4]
        ...
        END

Thirdly, there are new command-line options, -apcs <options>, which affect
the pre-declaration of register names and the default attributes of CODE
AREAs, as follows:

    -apcs r   
    -apcs u
    -apcs 2

    -apcs none

    -apcs 3{/opt}{/opt}...

By default, the register names R0..R15, r0..r15, sp, SP, lr, LR, pc, PC are
pre-declared. If 'r', 'u', '2' or an undecorated '3' are given then the
following are also pre-declared:

    a1..a4                      r0..r3
    v1..v6                      r4..r9
    sl                          r10
    fp                          r11
    ip                          r12
    
The optional /opt qualifiers are:

    /reent{rant}                pre-declare sb in place of v6
                                mark CODE AREAs REENTRANT

    /32bit                      mark CODE AREAs as being for 32-bit ARMs
                                (the default, unless reconfigured)
    /26bit                      mark CODE AREAs as being for 26-bit ARMs

    /swst{ackcheck}             mark CODE AREAs as using sl for the stack
                                limit register, following the APCS
                                (the default, unless reconfigured)
    /nosw{stackcheck}           mark CODE AREAs as not using software stack-
                                limit checking; pre-declare an additional v-
                                register, v6 if reentrant, v7 if not.

Qualifiers may be abbreviated as shown.

Fourthly, there are new options to IMPORT and EXPORT, as follows:

    IMPORT  symbol[fpregargs], symbol...
    EXPORT  symbol[fpregargs,code, leaf]

In both cases, the whole [...] is optional, and the attributes inside the
[...] may be specified in upper or lower case. The meaning is as follows:

    fpregargs                   This function will have floating-point
                                arguments passed to it in floating-point
                                registers (IMPORT); this fn expects FP args
                                passed in FP regs (EXPORT).

    code                        This CODE symbol defines a function or
                                procedure, not a read-only datum.

    leaf                        This CODE symbol defines a leaf function
                                (one which calls no functions).



Changes to Version 1.89
-----------------------

Version 1.89 was not released - all changes are subsumed into version 1.90.



Changes to Version 1.88 [May 24 1991]
-------------------------------------

Branches to unaligned labels are now faulted, not just warned of.

A bug in listing-file generation has been fixed and warning/error messages
now appear in the listing file if listing is enabled for the pass during
which the messages are generated.

The layout of the listing file has been improved for 80-column listings.

More dubious uses of R15 are now warned of (in FPstatus-class, MUL/MLA and
CPRT-clas instructions).



Changes to Version 1.87 [May 20 1991]
-------------------------------------

ObjAsm -depend had been broken by the search-path (-I) enhancements. This is
now fixed so that ObjAsm -depend dep -I <path> ... now outputs the correct
file names, as found on <path>.

ObjAsm now warns of branches to unaligned labels.

The ORG directive may now precede the first AREA, as originally intended,
and as advertised below.
 


Changes to Version 1.84 [May  3 1991]
-------------------------------------

The use of pc in the Rs position is now correctly diagnosed and warned of.

Errors and Warnings are now distinguished by the prefixes "Error: " and
"Warning: " respectively.

The generation of warnings can be suppressed using the -NOWarn keyword.

The assembler now gives up after (about) 50 errors.

Unless there are no warnings and no errors, the assembler summarises the
number of each at the end of the assembly.

When an AREA directive is found to be missing, the assembler now usually
creates a fake AREA with the name |$$$$$$$| in order to limit the number of
spurious follow-on errors. The assembly still fails, but the diagnostic
value may be greater. There remain circumstances under which an AREA will
not be faked, so there can still be multiple follow-on errors (but see above
re early termination after many errors).

The AREA attribute ABS has been re-introduced to indicate that the AREA is
rooted at a fixed address.

The ObjAsm variant of the assembler now accepts the ORG directive. This sets
the base address and ABS attribute of the containing AREA (or of the
following AREA if there is no containing AREA). Beware that it is thereby
possible to create objects that cannot be linked (see notes on recent linker
changes for an explanation).

Previous version of ObjAsm have faulted perfectly good PC-relative,
relocatable expressions, such as BL &3ffffc, because of inadequacies in
very old versions of the object code and linker. This restriction has now
been lifted.



Changes to Version 1.83 [Apr 29 1991]
-------------------------------------

The (RISC OS only) interactive mode has been dropped and the -Quit option is
now ignored as the assembler can no longer enter interactive mode.


The -Print keyword now takes a mandatory file name argument, the name of the
file in which the listing should be produced. "-Print -" causes the listing
to be produced on stdout (as used to be caused by -Print).


The new keyword "-list" (no abbreviation) is a synonym for "-Print".


The default listing width is now 79 columns (was 131); the default page
length is now 66 lines (was 60). Use -WIdth <width> and -Length <length> to
alter the default values.


Most Unix filenames are now acceptable under RISC OS, allowing common,
portable sources to be developed.


The assembler now searches for files along an include path specified with
multiple -I<path> options, just as for cc. Thus it is no longer necessary to
fully qualify the arguments to GET and LNK directives. For example:
    objasm -I../includes
        ...
        GET file.s
        ...
will try ./file.s and ../includes/file.s. Successfully resolved included
places are stacked using the Berkeley C compiler stacking rule. Thus an
included file is first sought relative to the place containing the including
file, rather than relative to the original source. Consider:
    objasm -I../includes test/file1.s
        ...
        GET file2.s         ; try test/file2.s then ../includes/file2.s  
            ...
            GET ../file3.s  ; try test/../file3.s then ../includes/file3.s
                            ; OR  ../includes/../file3.s then ...
Often, it makes no difference which include rule is used.


The -PreDefine keyword allows a global SETA, SETS or SETL to be executed
from the command line. The associated GBLx is implied. For example:
    objasm -PD "Unix SETL {TRUE}" ...
Usually, the argument to -PreDefine will have to be quoted, as it contains
spaces (this is true for both Unix and RISC OS hosts).


The register names r0-r15, R0-r15, f0-f7, F0-F7 and p0-p15 and co-processor
numbers c0-c15 are now predefined by the assemblers. Non-identical re-
definition is faulted. By default, the ARM Procedure Call Standard (APCS)
register names a1-a4, v1-v6, sl, fp, ip, sp, lr, pc are pre-defined unless
the keyword option "-Apcs None" is used.


The new directive NOP generates a no-op instruction, currently coded as MOV
r0, r0. Assemblers for future ARMs may encode NOP differently.


The assembler now warns about (but still generate code for) the following
unsafe, undefined or deprecated instructions:

    <opcode>NV              ; reserved for future op-code expansion
    <ALUop>  ..., SHF r15   ; reserved for future op-code expansion

    MUL/MLA  r15, ...       ; incorrect use of PC/PSR
    MUL/MLA  rd, r15, ...   ; incorrect use of PC/PSR
    MUL/MLA  rx, rx, rs     ; Rd must be different from Rm...

    LDR/STR  ..., [pc,...]! ; PC-relative with base write-back
    LDR/STR  ..., [pc], ... ; has undefined effect.

    LDR/STR  Rd, [Rn pc...] ; PSR bits may corrupt PC value
    LDR/STR  Rd, [Rn], pc...;

    LDR/STR  Rd, [Rn], Rn...; Deprecated: post-indexed with Rm = Rn
                            ; (can't be unwound by abort handlers)

    LDM/STM  Rn!, <rlist>^  ; Undefined effect: base write-back when forcing
                            ; user mode (when r15 not in <rlist>).
    LDM/STM  pc...          ; Undefined effect: PC as base.

    SWP                     ; Any use of pc is erroneous.

    LDC/STC  ..., [pc...]!  ; PC-relative with base write-back has undefined
    LDC/STC  ..., [pc], ... ; effect.

