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- Features
- Configuration Bits
- RAM map
- SFR map

PIC16F747
CONFIG1 (address:0x2007, mask:0xFFFF)
FOSC -- Oscillator Selection bits
| FOSC = LP | 0x3FEC | LP oscillator. |
| FOSC = XT | 0x3FED | XT oscillator. |
| FOSC = HS | 0x3FEE | HS oscillator. |
| FOSC = EC | 0x3FEF | EXTCLK; port I/O function on OSC2/CLKO/RA6. |
| FOSC = INTOSCIO | 0x3FFC | INTRC oscillator; port I/O function on OSC1/CLKI/RA7 and OSC2/CLKO/RA6. |
| FOSC = INTOSCCLK | 0x3FFD | INTRC oscillator; CLKO function on OSC2/CLKO/RA6 and port I/O function on OSC1/CLKI/RA7. |
| FOSC = EXTRCIO | 0x3FFE | EXTRC oscillator; port I/O function on OSC2/CLKO/RA6. |
| FOSC = EXTRCCLK | 0x3FFF | EXTRC oscillator; CLKO function on OSC2/CLKO/RA6. |
WDTE -- Watchdog Timer Enable bit
| WDTE = OFF | 0x3FFB | WDT disabled. |
| WDTE = ON | 0x3FFF | WDT enabled. |
PWRTE -- Power-up Timer Enable bit
| PWRTE = ON | 0x3FF7 | PWRT enabled. |
| PWRTE = OFF | 0x3FFF | PWRT disabled. |
MCLRE -- MCLR/VPP/RE3 Pin Function Select bit
| MCLRE = OFF | 0x3FDF | MCLR/VPP/RE3 pin function is digital input only, MCLR gated to '1'. |
| MCLRE = ON | 0x3FFF | MCLR/VPP/RE3 pin function is MCLR. |
BOREN -- Brown-out Reset Enable bit
| BOREN = OFF | 0x3FBF | Disabled. |
| BOREN = ON | 0x3FFF | Enabled. |
BORV -- Brown-out Reset Voltage bits
| BORV = 45 | 0x3E7F | VBOR set to 4.5V. |
| BORV = 42 | 0x3EFF | VBOR set to 4.2V. |
| BORV = 27 | 0x3F7F | VBOR set to 2.7V. |
| BORV = 20 | 0x3FFF | VBOR set to 2.0V. |
DEBUG -- In-Circuit Debugger Mode bit
| DEBUG = ON | 0x37FF | In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger. |
| DEBUG = OFF | 0x3FFF | In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins. |
CCP2MX -- CCP2 Multiplex bit
| CCP2MX = RB3 | 0x2FFF | CCP2 is on RB3. |
| CCP2MX = RC1 | 0x3FFF | CCP2 is on RC1. |
CP -- Flash Program Memory Code Protection bits
| CP = ON | 0x1FFF | 0000h to 0FFFh code-protected. |
| CP = OFF | 0x3FFF | Code protection off. |
CONFIG2 (address:0x2008, mask:0xFFFF)
FCMEN -- Fail-Safe Clock Monitor Enable bit
| FCMEN = OFF | 0x3FFE | Fail-Safe Clock Monitor disabled. |
| FCMEN = ON | 0x3FFF | Fail-Safe Clock Monitor enabled. |
IESO -- Internal External Switchover bit
| IESO = OFF | 0x3FFD | Internal External Switchover mode disabled. |
| IESO = ON | 0x3FFF | Internal External Switchover mode enabled. |
BORSEN -- Brown-out Reset Software Enable bit
| BORSEN = OFF | 0x3FBF | Disabled. |
| BORSEN = ON | 0x3FFF | Enabled. |

This page generated automatically by the device-help.pl program (2012-12-22 23:50:58 UTC) from the 8bit_device.info file (rev: 1.10) of mpasmx and from the gputils source package (rev: svn 918). The mpasmx is included in the MPLAB X.