- All
- Enhanced
- Extended
- Regular
- 12 bits
- 14 bits
- 16 bits
- by RAM size
- by ROM size
- by EEPROM size

- Features
- Configuration Bits
- RAM map
- SFR map

PIC16LF1508
| Bank 0 |  | Bank 1 |  | Bank 2 |  | Bank 3 |  | Bank 4 |  | Bank 7 |  | Bank 9 |  | Bank 12 |  | Bank 13 |  | Bank 30 |  | Bank 31 |
INDF0 | 0x000
INDF1 | 0x001
PCL | 0x002
STATUS | 0x003
FSR0FSR0L | 0x004
FSR0H | 0x005
FSR1FSR1L | 0x006
FSR1H | 0x007
BSR | 0x008
WREG | 0x009
PCLATH | 0x00A
INTCON | 0x00B
PORTA | 0x00C
PORTB | 0x00D
PORTC | 0x00E
PIR1 | 0x011
PIR2 | 0x012
PIR3 | 0x013
TMR0 | 0x015
TMR1TMR1L | 0x016
TMR1H | 0x017
T1CON | 0x018
T1GCON | 0x019
TMR2 | 0x01A
PR2 | 0x01B
T2CON | 0x01C
TRISA | 0x08C
TRISB | 0x08D
TRISC | 0x08E
PIE1 | 0x091
PIE2 | 0x092
PIE3 | 0x093
OPTION_REG | 0x095
PCON | 0x096
WDTCON | 0x097
OSCCON | 0x099
OSCSTAT | 0x09A
ADRESADRESL | 0x09B
ADRESH | 0x09C
ADCON0 | 0x09D
ADCON1 | 0x09E
ADCON2 | 0x09F
LATA | 0x10C
LATB | 0x10D
LATC | 0x10E
CM1CON0 | 0x111
CM1CON1 | 0x112
CM2CON0 | 0x113
CM2CON1 | 0x114
CMOUT | 0x115
BORCON | 0x116
FVRCON | 0x117
DACCON0 | 0x118
DACCON1 | 0x119
APFCON | 0x11D
ANSELA | 0x18C
ANSELB | 0x18D
ANSELC | 0x18E
PMADRPMADRL | 0x191
PMADRH | 0x192
PMDATPMDATL | 0x193
PMDATH | 0x194
PMCON1 | 0x195
PMCON2 | 0x196
RCREG | 0x199
TXREG | 0x19A
SPBRGL | 0x19B
SPBRGH | 0x19C
RCSTA | 0x19D
TXSTA | 0x19E
BAUDCON | 0x19F
WPUA | 0x20C
WPUB | 0x20D
SSP1BUFSSPBUF | 0x211
SSP1ADDSSPADD | 0x212
SSP1MSKSSPMSK | 0x213
SSP1STATSSPSTAT | 0x214
SSP1CON1SSPCON SSPCON1 | 0x215
SSP1CON2SSPCON2 | 0x216
SSP1CON3SSPCON3 | 0x217
IOCAP | 0x391
IOCAN | 0x392
IOCAF | 0x393
IOCBP | 0x394
IOCBN | 0x395
IOCBF | 0x396
NCO1ACCNCO1ACCL | 0x498
NCO1ACCH | 0x499
NCO1ACCU | 0x49A
NCO1INCNCO1INCL | 0x49B
NCO1INCH | 0x49C
NCO1INCU | 0x49D
NCO1CON | 0x49E
NCO1CLK | 0x49F
PWM1DCL | 0x611
PWM1DCH | 0x612
PWM1CONPWM1CON0 | 0x613
PWM2DCL | 0x614
PWM2DCH | 0x615
PWM2CONPWM2CON0 | 0x616
PWM3DCL | 0x617
PWM3DCH | 0x618
PWM3CONPWM3CON0 | 0x619
PWM4DCL | 0x61A
PWM4DCH | 0x61B
PWM4CONPWM4CON0 | 0x61C
CWG1DBR | 0x691
CWG1DBF | 0x692
CWG1CON0 | 0x693
CWG1CON1 | 0x694
CWG1CON2 | 0x695
CLCDATA | 0xF0F
CLC1CON | 0xF10
CLC1POL | 0xF11
CLC1SEL0 | 0xF12
CLC1SEL1 | 0xF13
CLC1GLS0 | 0xF14
CLC1GLS1 | 0xF15
CLC1GLS2 | 0xF16
CLC1GLS3 | 0xF17
CLC2CON | 0xF18
CLC2POL | 0xF19
CLC2SEL0 | 0xF1A
CLC2SEL1 | 0xF1B
CLC2GLS0 | 0xF1C
CLC2GLS1 | 0xF1D
CLC2GLS2 | 0xF1E
CLC2GLS3 | 0xF1F
CLC3CON | 0xF20
CLC3POL | 0xF21
CLC3SEL0 | 0xF22
CLC3SEL1 | 0xF23
CLC3GLS0 | 0xF24
CLC3GLS1 | 0xF25
CLC3GLS2 | 0xF26
CLC3GLS3 | 0xF27
CLC4CON | 0xF28
CLC4POL | 0xF29
CLC4SEL0 | 0xF2A
CLC4SEL1 | 0xF2B
CLC4GLS0 | 0xF2C
CLC4GLS1 | 0xF2D
CLC4GLS2 | 0xF2E
CLC4GLS3 | 0xF2F
ICDIO | 0xF8C
ICDCON0 | 0xF8D
ICDSTAT | 0xF91
DEVSEL | 0xF95
ICDINSTL | 0xF96
ICDINSTH | 0xF97
ICDBK0CON | 0xF9C
ICDBK0L | 0xF9D
ICDBK0H | 0xF9E
BSRICDSHAD | 0xFE3
STATUS_SHAD | 0xFE4
WREG_SHAD | 0xFE5
BSR_SHAD | 0xFE6
PCLATH_SHAD | 0xFE7
FSR0L_SHAD | 0xFE8
FSR0H_SHAD | 0xFE9
FSR1L_SHAD | 0xFEA
FSR1H_SHAD | 0xFEB
STKPTR | 0xFED
TOSL | 0xFEE
TOSH | 0xFEF
The mirror of [PCL, STATUS, ...] are not shown.

SFR

SFR with alias name.

This page generated automatically by the device-help.pl program (2012-12-22 23:50:58 UTC) from the 8bit_device.info file (rev: 1.10) of mpasmx and from the gputils source package (rev: svn 918). The mpasmx is included in the MPLAB X.