
P6MTRR.sys  P6 MTRRs management IOCtl PDD  ver.0.02
Copyright 1999 January June / 鉾P(Yotogi-Hime) / Beliefia Productions.



0. Introduction

  This is a P6 series processor(including PentiumPro, PentiumII, Celeron,
  PentiumIII and future releasing processors) Memory Type Range Registers
  (MTRRs) management interface PDD from non-Ring0 privileges via
  DosDevIOCtl().



1. Requirements

  - OS/2 Warp 3 or later

  - P6 series processor

  - some P6 MTRRs knowledge (of course!!)



2. Installation

  - Unzip archive and place P6MTRR.sys to where you desire.

  - Add "DEVICE=x:\path\P6MTRR.sys" line to your CONFIG.SYS.

  - Shutdown and restart your system.



3. Precautions & Limitations

  - Be with great care when modifying any MTRRs.
    Improper MTRR settings may cause kernel-level crashes immediately.

  - One DosDevIOCtl() call will affect one CPU only.
    Thus, in SMP environments, multiple DosDevIOCtl() calls must be required
    with thread-CPU binding such as DosSetThreadAffinity() [Aurora only].

    Hmmm, OS/2 Warp Server SMP seems to lack APIs that bind thread-CPU
    relationship...



4. Evaluation Sample

  - M_P6MTRR.exe is a evaluation sample executable that manages P6 MTRRs
    using P6MTRR.sys.

  - To show all current MTTR settings, enter "M_P6MTRR q".

  - To modify current MTRR variable range settings,
          M_P6MTRR sv #ofRange [Valid [MemType [PhysMemBase [PhysMemMask]]]]
      - #ofRange    : Number of MTRR variable range, typically 0 to 7.
      - Valid       : Item valid flag, yes or no. Invalid items will be
                      ignored.
      - MemType     : Memory type, UC(Uncachable), WC(Write Combine),
                      WT(Write Through), WP(Write Protected) or
                      WB(Write Back).
      - PhysMemBase : Physical memory base, most 24bits of 36bits, in hex.
      - PhysMemMask : Physical memory mask, most 24bits of 36bits, in hex.
    Omitted arguments will be replaced with current settings.

  - Example, you want to set video frame buffer lying in physical memory
    range 0x48000000-0x4fffffff to Write Combine memory type,
        M_P6MTRR sv 7 y WC 048000 ff8000

  - And you want to disable above setting, simply
        M_P6MTRR sv 7 n
    or
        M_P6MTRR sv 7 y UC



5. Feedback

  - Please send email to Takayuki 'January June' Suwa.
    mailto:jjsuwa@sys3175.com  [ access violation :) ]



6. History

  - v0.01 : Dec.1st,1999
     - Initial release.

  - v0.02 : Dec.4th,1999
     - (P6MTRR.sys) Added parameter/data checking.
     - (P6MTRR.h) Added some comments/constants.
     - (P6MTRR.sym) Built for kernel debugger.

